SEARC bridges academia and industry through cutting-edge research in Smart Engineering, fostering innovation and sustainable technology solutions.
Established in 2020 at Centurion University of Technology & Management, Odisha, India
The Smart Engineering Applications Research Centre (SEARC), established in 2020 at Centurion University of Technology & Management, Odisha, India, is dedicated to advancing innovation through interdisciplinary research and development.
The Centre focuses on designing and developing low-cost, indigenous technologies in areas such as IoT, Embedded Systems, Edge AI, and Chip Development. SEARC aims to foster a culture of innovation by bridging the gap between academia and industry, promoting sustainable engineering solutions, and addressing real-world challenges.
The Centre actively collaborates with national and international organizations to drive impactful research, skill development, and technology transfer.
To be a globally recognized center of excellence in Smart Engineering, driving innovation in IoT, Edge AI, Embedded Systems, and Chip Development to create sustainable, intelligent, and impactful solutions for real-world challenges.
Six core pillars driving our interdisciplinary research agenda across embedded systems, chip design, AI, and more.
From apparel tracking systems to silicon tapeouts — real engineering innovations developed at SEARC labs.
An integrated IoT-based digital manufacturing solution for the apparel industry — tracking production efficiency, identifying bottlenecks, and enabling data-driven quality control across the manufacturing floor.
An indigenously designed Programmable Logic Controller (PLC)-class industrial automation controller developed at CUTM. The CLC brings low-cost, customisable automation hardware to Indian manufacturing and smart factory applications.
Complete physical design of the Chromite M RISC-V SoC using industry-standard Cadence EDA tools at 45nm technology node — covering floorplanning, placement, clock tree synthesis, routing, and sign-off verification.
Simulation case studies on AUTOSAR and CAN Protocol for virtual ECU & VCU development for three and four-wheelers — enabling cost-effective automotive control unit prototyping and validation.
SEARC has achieved 11 chip tapeouts via the TinyTapeout program — a remarkable demonstration of academic-level chip design capability, taking digital designs from RTL all the way to fabricated silicon.
Ongoing AI and Edge Computing projects at SEARC — from orthopedic exercise chairs for elderly patients to smart monitoring systems powered by on-device machine learning inference.
Centurion University is part of the National Grid EDA Tools network under the Design Linked Incentive (DLI) Scheme of the Ministry of Electronics and Information Technology (MEITY). Through the Chip to Startup (C2S) Programme, SEARC received licenses for advanced industry-grade EDA tools, enabling world-class chip design education and research.
SEARC developed a suite of IoT-based automation prototypes for Nandankanan Zoological Park, Odisha — one of India's premier zoological parks. The project integrates smart dispensers, intelligent waste management, and environmental monitoring to modernise zoo operations and improve animal welfare using affordable, indigenous technology.
SEARC at the world stage — representing Centurion University at premier global design automation and semiconductor conferences.
The 62nd Design Automation Conference at Moscone West is the premier global design automation event, assembling the ecosystem's foremost leaders. Presenting our institution at DAC puts our vision and work on the map — not just in the US but globally. As a skill university associated with the electronic design ecosystem, SEARC attends DAC to find the latest solutions in AI, EDA, chip verification, design, and more.
The DAC exhibition opened at 10 AM at Moscone West. We had an exciting stream of visitors, including industry leaders, government officials from India, and distinguished academics. Several promising opportunities emerged for academic and industry collaborations. Our Vice President attended the booth, alongside the esteemed Dr. Sunil Sabat and Mr. Purna Mohanty. Booth member: Mr. Laxmikant Sutar.
Collaboration talks with Prof. Mircea Stan (University of Virginia), Akyra Pagoulatos (CEO Xiphera), Walter Klinger (UC Irvine), Lei He (UCLA/EIT China), Farhad Mafie (Savant Industries), Mohammad Salman, Mr. Samir Patel (IIT-GN / CEO StarIC), and SocioNext CTOs. Mr. Sanjeev Panda and Mr. Niranjan Tripathy made impactful promises for Chiplet sector collaborations. Talks with Altair's Global Head. Visit by Dr. Harika Dechiraju and Mrs. Padma Dechiraju.
Dr. Chandra Sekhar Dash represented SEARC at Semicon India 2025 in New Delhi, engaging with semiconductor industry leaders, showcasing CUTM's research capabilities including the Centurion Logic Controller and SoC Architecture, and exploring collaboration opportunities in chip design and embedded systems.
Our research team spans three campuses — BBSR, PKD, and VZM — led by experienced coordinators and driven by dedicated faculty.
State-of-the-art laboratories and simulation tools enabling cutting-edge research across all our focus areas.
SEARC has access to state-of-the-art simulation tools for cutting-edge research and development:
A growing body of research publications, filed patents, and faculty recognition across our research domains.
Hands-on programs conducted by SEARC for students and faculty — spanning embedded systems, VLSI, IoT, EV technology, biomedical engineering, and agri-tech.
A one-month hands-on internship covering embedded systems design, microcontroller programming, and robotic integration — giving students real-world hardware-software experience.
Industry-standard full custom IC design using Cadence EDA tools — covering schematic entry, simulation, layout, and DRC/LVS sign-off verification.
Hands-on workshop building end-to-end IoT applications on 32-bit ARM microcontrollers — sensor interfacing, wireless protocols, and cloud connectivity.
Introduction to Geovia Surpac for geological modelling and mine planning — covering 3D solid modelling, resource estimation, and mine design workflows.
Two-day intensive on industrial controllers and PLC-based automation — ladder logic, HMI interfacing, and real-time control of industrial processes.
Workshop on EV design principles and physical assembly — covering powertrains, battery management systems, motor controllers, and chassis integration.
Acquisition, processing and analysis of biomedical signals (ECG, EMG, EEG) using MATLAB — filtering, feature extraction, and classification for healthcare applications.
Focused workshop on PCB design — schematic capture, component placement, routing, design rule checks, and generating Gerber files for fabrication.
3D printing and additive manufacturing in engineering and biomedical domains — materials, FDM/SLA processes, and applications including prosthetics and implants.
Training on modern smart agricultural machinery — GPS-guided equipment, precision farming, automated irrigation, and IoT-enabled crop monitoring.
SEARC collaborates with industries, academic institutions, and research organizations to promote innovation and technology transfer.
Developing Physical AI use cases in collaboration with L&T Technology Services — deploying intelligent agents in industrial environments.
www.ltts.com ↗Collaboration in custom silicon design, SoC architecture, and ASIC development — advancing chip design research and providing industry-aligned training for SEARC members.
www.marqueesemi.com ↗Partnership in semiconductor IP development, verification, and licensing — strengthening SEARC's capabilities in silicon IP design and chip-level research.
www.signatureip.ai ↗SEARC provides expert consultancy in Physical Design, VLSI, Semiconductor Technologies, and Advanced Chip Design — bridging academic research with industry-grade engineering solutions.
A sponsored industry-collaborative research project focused on Advanced Semiconductor Design with emphasis on Physical Design. The project involves deep collaboration between SEARC researchers and Marquee Semiconductor Pvt. Ltd. to advance chip-level physical design methodologies, covering floorplanning, placement, clock tree synthesis, routing, and sign-off verification using industry-standard EDA tools.
SEARC welcomes industry partnerships for semiconductor design consultancy, collaborative research, and specialised training programs.
SEARC nurtures an innovation ecosystem that extends beyond research — incubating technology startups and empowering student clubs to build real-world engineering skills.
A visual archive of SEARC's research activities, events, conferences, and lab work across campuses and global stages.
Reach out for research collaborations, internship opportunities, or to learn more about SEARC's programs.